With downsizing of semiconductor devices, it becomes difficult to form a line-and-space pattern having a width narrower than the resolution limit of lithography. In order to solve this problem, a sidewall transferring process has been proposed.
In the related arts, for example, a NAND type flash memory is manufactured by using the following method which uses the sidewall transferring process. First, in a semiconductor substrate on which a tunnel insulating film, a floating gate electrode film, an inter-electrode insulating film, and a control gate electrode film are stacked, a mask film and a hard mask film are further stacked on a processing target film. Next, a resist pattern used to form selection gate lines or peripheral circuits is formed on the hard mask film by using a general photolithography technique, and the hard mask film is etched with the resist pattern as an etching mask by using an RIE (Reactive Ion Etching) method so as to form a hard mask pattern. After that, in an area for forming word lines, line-and-space shaped resist patterns having a first pitch are formed on the mask film by using the general photolithography technique. After a sliming process is performed on the resist patterns, the mask film is etched with the resist patterns and the hard mask patterns as etching masks by using the RIE method so as to form mask patterns. Next, a sidewall film is conformally formed on the processing target film with use of the mask patterns formed thereon. After performing an etch-back process, the mask patterns in the area for word lines are removed, so that closed-loop-shaped sidewall patterns are formed. Next, the processing target film is processed by using the closed-loop-shaped sidewall patterns in the area for word lines while it is processed by using the mask pattern in the other areas. Accordingly, the word lines, the selection gate lines, and the peripheral circuits of the NAND type flash memory are formed.
In this manner, since an exposure process cannot be formed simultaneously for fine patterns and relatively large-scale patterns with the photolithography technique of the related art, the line-and-space patterns for forming word lines having the smallest size in a semiconductor device and the patterns for forming selection gate lines or peripheral circuits having relatively large sizes are formed by using different exposure processes.
In addition, in a case where the mask is formed by using the photolithography technique and the processing target film is processed by using the mask through the RIE method as described above, conversion difference generally occurs in which the processed pattern becomes larger in size than the mask, which hinders patterns from being formed with high accuracy.